Delta 45 Specifications download pdf (Page 11)

D1 D2 D3 D4 D5

D7 D9D8 D11 D0 D1 D2 D3

D11

D10 D4 D5

BCLK+

WCLK-

Output data

System Clock

BCLK

Sample n

Sample n+1

WCLK+

BCLK-

DOn+

DOn-

Word Clock

Bit Clock

WCLK

D10

ADC12EU050

www.ti.com

SNAS444I –JANUARY 2008–REVISED APRIL 2013

AC AND TIMING CHARACTERISTICS (SERIAL INTERFACE)

Unless otherwise specified, the following conditions apply: V

= V

= 1.2V; V

REF

= internal; R

REF

= 10kohm ±1%;

= 5pF; 100Ω terminated at the receiver; f

CLK

= 45MHz; f

= 45MSPS. Boldface limits apply for T

= T

MIN

to T

MAX

; All other

limits apply for T

= +25°C.

Symb

Parameter Conditions Typical

(1)

Limits Units

Serial Interface

SSELS

SEL

setup time 250 ns

SSELH

SEL

hold time 250 ns

DATA

setup time, write transaction 250 15 ns (max)

DATA

hold time, write transaction 250 10 ns (max)

SCLK

CLK

period 1 0.2 µs (min)

SCLKL

CLK

low time 450 ns (min)

SCLKH

CLK

high time 450 ns (min)

SCLKR

CLK

rise time 50 ns

SCLKF

CLK

fall time 50 ns

SSELHI

SEL

high time Applies to read and write transactions 500 ns

DATA

valid setup time, read

100 -5 ns (min)

transaction

DATA

valid hold time, read transaction 250 10 ns (min)

(1) Typical figures are at TA = 25°C, and represent most likely parametric norms at the time of product characterization. The typical

specifications are not ensured.

TIMING DIAGRAMS

Figure 2. LVDS/SLVS Output Timing

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