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Delta 45 Specifications Page 26

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100 nF
505
100 nF
100 nF
100 nF
47 µF
V
IN
0+
V
IN
0-
V
IN
1+
V
IN
1-
CLK+ (SE)
CLK-
V
REFT
V
REFB
D
CAP
RST
SLEEP
S
SEL
S
CLK
S
DATA
DO0+
DO0-
DO1+
DO1-
DO2+
DO2-
DO3+
DO3-
DO4+
DO4-
DO5+
DO5-
DO6+
DO6-
DO7+
DO7-
WCLK+
WCLK-
BCLK+
BCLK-
100 nF
100 nF
100 nF
1005
Note: External 1005 termination
on the ADC12EU050 is optional.
Internal termination can be
enabled via SPI.
10 µF
R
REF
100 nF
10 k5 ±1%
V
DR
To SPI
controller
Transformer drive circuit.
Other possible drive circuits
shown in Applications
Information.
45 MHz clock. See
Applications
Infomation for more
information on
clocking the
ADC12EU050
V
A
100 nF
V
D
47 µF
100 nF
V
DR
AGND DGND
V
A
Pins
V
D
Pins
V
DR
Pins
V
CM
ADT1-6T
10 µH
10 µH
10 µH
1005
1005
1005
1005
1005
1005
1005
1005
1005
47 µF
V
IN
2+
V
IN
2-
V
IN
3+
V
IN
3-
V
IN
4+
V
IN
4-
V
IN
5+
V
IN
5-
V
IN
6+
V
IN
6-
V
IN
7+
V
IN
7-
ADC12EU050
SNAS444I –JANUARY 2008–REVISED APRIL 2013
www.ti.com
Figure 24. ADC12EU050 Application Diagram
26 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: ADC12EU050
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