Delta PG-40 Specifications download pdf (Page 92)

VFD-B Series

5-57

START

A silent interval of more than 10 ms

ADR Communication address: 8-bit address

CMD Command code: 8-bit command

DATA (n-1)

DATA 0

Contents of data:

n×8-bit data, n<=16

CRC CHK Low

CRC CHK High

CRC check sum:

16-bit check sum consists of 2 8-bit characters

END

A silent interval of more than 10 ms

3.2 ADR (Communication Address)

Valid communication addresses are in the range of 0 to 254. A communication

address equal to 0, means broadcast to all AC drives (AMD). In this case, the AMD

will not reply any message to the master device.

For example, communication to AMD with address 16 decimal:

ASCII mode: (ADR 1, ADR 0)=’1’,’0’ => ‘1’=31H, ‘0’=30H

RTU mode: (ADR)=10H

3.3 CMD (Command code) and DATA (data characters)

The format of data characters depends on the command code. The available

command codes and examples for VFD-B are described as followed:

(1) 03H: multi read, read data from registers.

Example: reading continuous 2 data from register address 2102H, AMD address

is 01H.

ASCII mode:

Command message: Response message:

STX ‘:’ STX ‘:’

‘0’ ‘0’ ADR 1

ADR 0

‘1’

ADR 1

ADR 0

‘1’

‘0’ ‘0’

CMD 1

CMD 0

‘3’

CMD 1

CMD 0

‘3’

‘2’ ‘0’

‘1’

Number of data

(Count by byte)

‘4’

‘0’ ‘1’

Starting data

address

‘2’ ‘7’

‘0’ ‘7’

‘0’

Content of

2102H

‘0’

‘0’ ‘0’

Number of data

(count by word)

‘2’ ‘0’

LRC CHK 1 ‘D’

Content of

‘0’

1 2 ... 87 88 89 90 91 92 93 94 95 96 97 ... 178 179

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Delta PG-40 Specifications Page 92

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