Delta 45 Specifications download pdf (Page 24)

ADC

REF

REFT

REFB

ADC

REF

REFT

REFB

ADC

REF

REFT

REFB

AGND

plane

10 k5

(± 1%)

10 k5

(± 1%)

10 k5

(± 1%)

Digital Filter saturates at IOR

mode full scale, determined

by DGF register.

IOR Mode full

scale input

1.56 Vpp

differential

Analog sigma delta modulator clips at

voltage selected by OL register.

This protects the Sigma-delta modulator

from overload.

Analog Clipping Digital Saturation

Input Output

Over-rage input, up to

5 dB above full scale.

ADC12EU050

SNAS444I –JANUARY 2008–REVISED APRIL 2013

www.ti.com

OL should then be set to a value approximately half-way between the new full scale input range (which was just

selected by DGF) and the default full scale input range of 2.10Vpp. OL must be set to a value higher than DGF,

otherwise the signal will be limited by the analog clipping circuitry, rather than the digtal circuitry, and overload

recovery will be impacted.

Figure 21. IOR Mode Signal Modification

THE VOLTAGE REFERENCE

The ADC provides an on chip, ±5% tolerance voltage reference, together with all necessary biasing circuits and

current sources. A 10kΩ (±1%) resistor must be connected between R

REF

and AGND in order to establish the

biasing current of the ADC. The internal reference voltage, V

REF

, is available at the R

REF

pin.

When using the internal reference, V

REFT

should be connected to AGND through a 100nF capacitor, while V

REFB

must be connected to AGND.

Chip-to-chip gain matching between several ADC12EU050 ADCs can be improved by connecting the V

REFT

pins

of the ADCs. This is show in the figure below.

Figure 22. Reference Sharing

If a tighter tolerance reference is required for improved thermal stability, an external voltage reference can be

connected between the V

REFT

and V

REFB

pins. The R

REF

resistor must be connected even when using an external

reference.

Product Folder Links: ADC12EU050

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Delta 45 Specifications Page 24

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