Delta 35 Specifications

Browse online or download Specifications for Space heaters Delta 35. Delta 35 Specifications User Manual

  • Download
  • Add to my manuals
  • Print
  • Page
    / 18
  • Table of contents
  • BOOKMARKS
  • Rated4.9 / 5. Based on10 customer reviews
Page view 0
Rev. 0.2 2/05 Copyright © 2005 by Silicon Laboratories AN217
AN217
C8051F35X DELTA-SIGMA ADC USERS GUIDE
1. Introduction
Delta-sigma analog-to-digital converters (ADCs) are oversampling ADCs: to reduce noise and analog front-end
circuit cost and complexity, they sample signals at very high rates and produce a low-noise, high-resolution output.
Oversampling at a “high” rate means sampling a signal at a frequency that is well above the bandwidth of interest’s
Nyquist rate and is done to lower in-band noise. The output word rate of the ADC will be close to the bandwidth of
interest.
Delta-sigma ADCs also add benefit by shaping noise and digitally filtering the information to enhance performance.
The oversampling, noise shaping, and digital filtering allow highly linear, high-resolution signal measurements, and
reduce the cost and complexity of circuits that must filter the signal at the input of the ADC.
Delta-sigma ADCs oversample a signal and produce relatively low output data rates and are best used in
applications requiring high precision measurements (16 to 24 bits) of low-bandwidth signals (i.e., typically 20 kHz
or less). Example applications include digital phones, temperature measurements, pressure measurements, and
weigh-scales. The maximum C8051F35x ADC output word rate is 1 kHz.
Figure 1. ADC0 Block Diagram
Relevant Devices
This application note applies to the following devices:
C8051F350, C8051F351, C8051F352, C8051F353
AIN+
AIN-
AV+
Input
Buffers
Σ
Σ
PGA Modulator
÷
SYSCLK
MDCLK
SINC
3
Filter
Fast
Filter
Voltage
Reference
8-Bit
Offset
DAC
Page view 0
1 2 3 4 5 6 ... 17 18

Summary of Contents

Page 1 - Relevant Devices

Rev. 0.2 2/05 Copyright © 2005 by Silicon Laboratories AN217AN217C8051F35X DELTA-SIGMA ADC USER’S GUIDE1. IntroductionDelta-sigma analog-to-digital

Page 2 - 2.1. Signal

AN21710 Rev. 0.2SFR Definition 2.5. ADC0MD: ADC0 ModeBit 7: AD0EN: ADC0 Enable Bit.0: ADC0 Disabled. ADC is in low-power shutdown.1: ADC0 Enabled. A

Page 3 - Rev. 0.2 3

AN217Rev. 0.2 113. Hardware DesignDesigning a low-noise, high-precision measurement system requires not only proper ADC configuration, butcareful cir

Page 4 - ADC0CN: ADC0 Control Register

AN21712 Rev. 0.2Figure 5. Single-Ended Measurements and Ground Circuits: Poor PerformanceFigure 6. Differential Measurements Reject Common-Mode NoiseF

Page 5 - MDCLK SYSCLK()ADC0CLK 1+()⁄=

AN217Rev. 0.2 134. Delta-Sigma Noise SpecificationsDelta-sigma converters make high-precision, high-resolution measurements of signals. Often, the me

Page 6 - 6 Rev. 0.2

AN21714 Rev. 0.24.1. Effective ResolutionMany ADC applications measure a dynamic signal in the presence of noise. Noise sources include the ADC itsel

Page 7 - DECIMATION RATIO DECI 10:1[]=

AN217Rev. 0.2 15Table 1 is a copy of the posted specification of the ADC0’s typical noise table from the C8051F35x family datasheet. This table shows

Page 8 - 8 Rev. 0.2

AN21716 Rev. 0.2DOCUMENT CHANGE LISTRevision 0.1 to Revision 0.2 Updated text on page 15.

Page 9 - Rev. 0.2 9

AN217Rev. 0.2 17NOTES:

Page 10 - 111: System Gain Calibration

AN21718 Rev. 0.2CONTACT INFORMATIONSilicon Laboratories Inc.4635 Boston LaneAustin, TX 78735Tel: 1+(512) 416-8500Fax: 1+(512) 416-9669Toll Free: 1+(87

Page 11 - 3. Hardware Design

AN2172 Rev. 0.22. Using the C8051F35x Delta-Sigma ADCUsing delta-sigma ADCs require an understanding of how to properly configure the modulator, use

Page 12 - C8051F35x

AN217Rev. 0.2 3 Resistor: The resistor value should be high enough for isolation (i.e., at least 10s of ohms) but not too high to cause settling time

Page 13 - ADC Codes

AN2174 Rev. 0.22.2.1. Voltage ReferenceThe voltage reference circuit should be treated as carefully as the measured signal, because noise on the volta

Page 14 - 4.1. Effective Resolution

AN217Rev. 0.2 52.2.3. Offset DACThe ADC features an internal dedicated DAC that is used to adjust the measurement offset of the ADC. This canbe used a

Page 15 - Rev. 0.2 15

AN2176 Rev. 0.2Once the modulator clock is configured, the modulator sample rate of the ADC is also set to MDCLK/128.Therefore, the typical sample rat

Page 16 - DOCUMENT CHANGE LIST

AN217Rev. 0.2 72.2.6. The Digital FilterFigure 4. Digital Filter Frequency Response (SINC3)The filter’s function is to convert the 1-bit digital outpu

Page 17 - Rev. 0.2 17

AN2178 Rev. 0.2SFR Definition 2.3. ADC0DECH: ADC0 Decimation Ratio Register High ByteSFR Definition 2.4. ADC0DECL: ADC0 Decimation Ratio Register Low

Page 18 - CONTACT INFORMATION

AN217Rev. 0.2 9The ADC’s digital filter gives two options for output: FAST and SINC3. The FAST filter uses results from only thecurrent conversion cyc

Comments to this Manuals

No comments