Delta 35 Specifications Page 7
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Rev. 0.2 7
2.2.6. The Digital Filter
Figure 4. Digital Filter Frequency Response (SINC3)
The filter’s function is to convert the 1-bit digital output of the modulator to a large digital output word (16- or 24-
bits). The series of 1s and 0s input to the filter have a spectral shape that allows the digital filter to remove the
maximum amount of noise. The filter decimates the data from the modulator to output words at a lower rate (for the
desired bandwidth of interest). The filter’s job is to remove noise from the measurement, and will do so optimally at
a high decimation ratio. There is a trade-off between noise performance and the decimation ratio (see Table 1 on
page 14). Therefore, the designermust consider the increase in noise if a higher output word rate is desired. To
obtain the best performance, the filter’s decimation ratio should be configured to the highest possible value, while
still allowing the minimum required output word rate.
The decimation ratio is set in the ADC0 Decimation Ratio High and Low registers (ADC0DECH and ADC0DECL).
These two registers are used to form an 11-bit decimation ratio value and corresponding output word rate:
Equation 2. Decimation Ratio Register Value (DECI)
Equation 3. ADC0 Output Word Rate
ATTENUATION (dB)
FREQUENCY (Hz)
020 40 6080
-200
-100
0
[(SIN x)/x]
3
DECIMATION RATIO DECI 10:1[]=
Output Rate MDCLK 128 DECI 1+()×[
]
⁄=
- 1. Introduction 1
- Relevant Devices 1
- 2.1. Signal 2
- Rev. 0.2 3 3
- ADC0CN: ADC0 Control Register 4
- MDCLK SYSCLK()ADC0CLK 1+()⁄= 5
- 6 Rev. 0.2 6
- DECIMATION RATIO DECI 10:1[]= 7
- 8 Rev. 0.2 8
- Rev. 0.2 9 9
- 010: Single Conversion 10
- 111: System Gain Calibration 10
- 3. Hardware Design 11
- C8051F35x 12
- Number of Samples 13
- ADC Codes 13
- 4.2. Noise-Free Resolution 14
- 4.1. Effective Resolution 14
- Rev. 0.2 15 15
- DOCUMENT CHANGE LIST 16
- Rev. 0.2 17 17
- CONTACT INFORMATION 18
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