Delta 35 Specifications Page 3

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AN217
Rev. 0.2 3
Resistor: The resistor value should be high enough for isolation (i.e., at least 10s of ohms) but not too high to
cause settling time problems or gain errors. The gain error can be removed using the ADC’s calibration feature
(see the datasheet for details). When making a differential measurement, the input resistors to AIN+ and AIN–
must be matched to preserve common-mode rejection. It is typically more difficult to match higher valued
resistors.
Capacitor: The capacitor acts as a charge reservoir (supplying the switched ADC sample capacitor) and as a
noise filter. Further, the ADC capacitor switching can be viewed as an average, steady input current. In reality,
the switching creates spikes of charging current that are highly non-linear as the modulator switches the ADC’s
sample capacitor. An external capacitor aids in linearizing the measurement. Electrolytic capacitors should not
be used because they will introduce distortion. Ceramic capacitors work well and should be sized large enough
such that a high valued resistor is not necessary. Typically, capacitors valued in the 1/10th’s of µF’s are used.
A corner frequency below the sample rate (19.2 kHz) is typically sufficient (e.g., R = 100 and C = 0.1 µF) for
most applications.
2.2. The ADC: Configuring the Delta-Sigma
Figure 2. Configuring The Delta-Sigma ADC
To achieve a high-resolution measurement, the delta-sigma ADC consists of two basic subsystems: the modulator
and the digital filter. One important concept to understand when configuring a delta-sigma data converter is that the
sample rate is much higher than the output rate of the ADC, so each sample does not result in an ADC output. The
signal is oversampled and then filtered to achieve the high-resolution measurement with reduced analog front-end
circuit requirements.
8-Bit
Offset
DAC
AIN+
AIN-
Input
Buffers
Σ
Σ
PGA Modulator
SINC
3
Filter
Fast Filter
Voltage
Reference
1. Select
2. Gain
4. Configure
3. Zero/Tare
5. Configure
6. Configure
7. Calibrate
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