Delta MS210 User Manual download pdf (Page 11)

MS210

MS210 DS004 www.mshinetek.com

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The above information is the exclusive intellectual property of M-Shine Technologies Corporation and shall not be disclosed, distributed without permission

rom M-

hine.

General Functional Description

MS210 is a simple chip that can record the voice from microphone/Speaker to SPI memory, and play the

voice from SPI memory directly. It built in high-quality ADPCM engine that can compress the voice data from

ADC to 4-bit per sample.

That is, when recording, sound are compressed to 4-bit per sample, and then stored to flash memory. While

erasing sectors on SPI flash memory, MS210 will store the compressed speech data in its own RAM. After

the sector is erased, the compressed data will be written to the SPI memory as soon as possible. Also, it will

overwrite the old record data and replaced by the new one whenever a voice is recorded.

Before start recording a short Beep prompt will be on the speaker. And 2 short “beep” will out after recording

stopped. Beep function can be disabled with BEEPEN short to GND.

In 1-segment mode, MS210 will record the speech from the beginning of the SPI flash. In 2-segment mode,

MS210 will record (overwrite) the speech of high-address voice segment.

When playing, MS210 will read the content from the SPI memory and decode with ADPCM decoder, and

perform the voice-changer function as required. In 1-segment mode, MS210 will play just one voice segment.

In 2-segment mode, MS210 will play 2 segments of voices one by one. Which one should be played first is

defined by PAD option.

MS210 playing is through D-Type Amplifier that has very good power efficiency and sound quality.

If TEST is low and SPIMISO is low, with PLAE connect to LEDBZ, MS210 will be act as band-limited

amplifier like Figure 26.

Reset and Initialization

MS210 has default Power-On-Reset (POR) that release at about 1.8 V. After around 300 ms after power-on,

MS210 will start to check the SPI flash memory connected. To power on correctly, the following constrains

must meet:

1. Before Power ON, VDD Must be < 0.3V. (V1 in Figure 4 must less than 3V)

2. After Power ON, VDD must be higher than the voltage that the SPI flash can work (usually 2.4V or 2.7V).

(V2 in Figure 4 must be greater than SPI Flash working voltage).

3. VDD Rise Time must be less than 0.2 second.

4. When power-ON, VDD curve must be monotonic. Bouncing between 0.3V~2.3V is not allowed.

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